Saravanan Gajendran’s Email & Phone

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Saravanan Gajendran

Seniro Staff Engineeer @ Marvell Semiconductor

Saravanan Gajendran Contact Details

Location:
Santa Clara, California, United States
Work:
Seniro Staff Engineeer @ Marvell Semiconductor
Staff Engineer @ Cavium Inc
Sr DFT Engineer @ Cisco Systems
Education:
About:

Saravanan Gajendran is skilled in: ASIC DFT, JTAG, SCAN/ATPG, MBIST, LBIST, Post-silicon bringup,, SoC, ASIC, Verilog, VLSI, RTL design, Debugging, DFT, TCL, Static Timing Analysis, Perl, C, VHDL, Functional Verification, SystemVerilog, FPGA, JTAG

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