Saravanan Gajendran’s Email & Phone

Image of Saravanan Gajendran

Saravanan Gajendran

Seniro Staff Engineeer @ Marvell Semiconductor

Saravanan Gajendran Contact Details

Santa Clara, California, United States
Seniro Staff Engineeer @ Marvell Semiconductor
Staff Engineer @ Cavium Inc
Sr DFT Engineer @ Cisco Systems

Saravanan Gajendran is skilled in: ASIC DFT, JTAG, SCAN/ATPG, MBIST, LBIST, Post-silicon bringup,, SoC, ASIC, Verilog, VLSI, RTL design, Debugging, DFT, TCL, Static Timing Analysis, Perl, C, VHDL, Functional Verification, SystemVerilog, FPGA, JTAG

Looking for a different Saravanan Gajendran?

Get an email address for anyone on LinkedIn with the ContactOut Chrome extension
Install the extension - it's free!

ContactOut is used by recruiters at 76% of the Fortune 500 companies

Similar Profiles to Saravanan Gajendran

Recruiters looking for Saravanan Gajendran also viewed
Most popular profiles
Related profiles
  • No profiles to display.

Looking for colleagues of Chris Shelby at Company Inc?

Image of Jianing Jianing Chen
Senior Design Engineer
Image of Xuebing Xuebing Yang
Senior Design Engineer
Image of Xuehua Xuehua Chen
Software Engineering Mananger
Image of Amir Amir Tekiyeh
Application Engineer
Image of Gary Gary Chow
Software Engineering Manager
Image of Mark Mark Fiorenza
Web Creative Director
Image of xuming xuming zhou
Staff ASIC Design Engineer
Image of Steve Steve Hope
Software Engineering
Image of Qirui Qirui Xu
ASIC Design Engineer
Image of Lee Lee Weethiam
Logistics Executive