Ravi Ram’s Email & Phone

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Ravi Ram

Principal Engineer, Verification and Methodology @ Xilinx

Ravi Ram Contact Details

Sunnyvale, California, United States
Principal Engineer, Verification and Methodology @ Xilinx
Verification Architect @ Altera
Principal MTS @ AMD
BS, Electrical Engineering @ PSG College of Technology

Verification Architect @ From November 2013 to Present (2 years 2 months)

Ravi Ram is skilled in: Verification, UVM/OVM, C, Perl, skill, backend layout tool development, SystemVerilog, Embedded Systems, FPGA, Verilog, ASIC, Functional Verification, SoC, SystemC, DDR, UVM, Open Verification Methodology, Simulations, DDR3, C, Mixed Signal, Semiconductors, Debugging

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