Megha Ladha’s Email & Phone

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Megha Ladha

Senior ASIC Design Engineer @ NVIDIA

Megha Ladha Contact Details

San Francisco Bay Area
Senior ASIC Design Engineer @ NVIDIA
ASIC Design Lead @ NVIDIA
ASIC Design Engineer @ NVIDIA
BE(Hons) @ Birla Institute of Technology and Science, Pilani

Megha Ladha is skilled in: ASIC, VLSI, Computer Architecture, Verilog, Logic Design, Static Timing Analysis, RTL design, Awesomeness, Integrated Circuit Design, SoC, Functional Verification, Low-power Design, Debugging, Primetime, Timing Closure

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