Manish Kasotiya’s Email & Phone

Manish Kasotiya Contact Details

Cupertino, California
HW Validation @ Apple
Verification Engineer @ Texas Instruments
Test Engineer @ Texas Instruments
B. Engineering, Electronics and Communications @ Dharmsinh Desai Institute of Technology

10 years of pre-tapeout and post silicon experience in verification/validation methods and technology with track-record of delivering results as a team leader as well as individual capable of taking complete ownership. Skills: Mixed-signal design and RTL verification using SV-UVM methodology Mixed-signal circuit blocks modeling using Verilog-AMS Constrained Random Verification and Regression SoC Functional Verification/Validation and Parametric Characterization: 

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