Informal Pathologist led Physiology & Pathology Continuing Ed
AI real-time software architect, real-time embedded system hardware design, firmware design, microcontrollers, networks, cloud frameworks (AIoT). Spec v2 Sys on Chip SoC embedded processor of year as processing system architect at @$2.4B/yr XILINX for Ultrascale MPSoC 16nm quad-core A53. Any CPU/DSP/OS, programmable logic, control systems, control software, ARM MCU, sensors, app & low-level embedded firmware development. Investment
AI real-time software architect, real-time embedded system hardware design, firmware design, microcontrollers, networks, cloud frameworks (AIoT). Spec v2 Sys on Chip SoC embedded processor of year as processing system architect at @$2.4B/yr XILINX for Ultrascale MPSoC 16nm quad-core A53. Any CPU/DSP/OS, programmable logic, control systems, control software, ARM MCU, sensors, app & low-level embedded firmware development. Investment patterns/strats. Design & Ported Real-Time OS RTOS apps, VxWorks, ThreadX, Micrium uC/OS-II, Free RTOS, device drivers; Patents; Oil ESP; Telemetry; AI algos, Industrial/Sci/Medical heart VAD/EKG/Ultrasound/MRI, High Perf Computing HPC, expert communication software, consumer, AV, mobile, Flash memory, Quant commodity/FX/stocks, big data mining, instrumentation, Grad@#8 UTexas Austin Electronics & Computer Engineering, client/server Linux, Win, IT, project management/finance, wearables, iOS, protocol stack, Debugger, C/C++, Assembly, Logic Analyzer, emulator. Director, top EE/CS teams in Austin/SanJose/HK/India/OKC 3200 EE/CS engineers, manage requirements, customers, vendors, ramp 150 factories. Concept sys modeling, rapid-prototyping, configurable subsystems to mass-production smart product & automated systems. Founder w/ multi-industry product life-cycles: market research, requirements, regulatory/IEC/ISO, tech marketing, specs, architect platform partition, design, GUI, test, patents, investment markets, app & sys SW lead, FAE, sales, deployment of $300M platform to IPO & acquisition. UT M. Sci. E-Engineer courses: Med Instruments & DSP, EKG, Clinical Biomedical Engineering. Freescale Director of Marketing says, "SigmaTel continued to earn several million dollars as direct result of Jonathan's teams efforts." Recruited by Google,Getco,GoldmanSachs IBM Watson AI, & System Architect requests: NVIDIA,Intel,AMD,Microchip,Samsung,Sandisk,Microsoft
Call to automate systems, test software, investment strats: 405-979-0723 info@DynamicLogic.US
Electronics & Software Engineer @ Wearable control system on chip (SOC) electronics, software and power architecture as new therapies for adult and pediatric heart failure. Intended to convert smart battery energy into circulation, perfusion & quality mobile lifespan extension.
Mixed-signal wearable health system for heart ventricle augmentation.
Member, American Society of Artificial Internal Organs (ASAIO)
Company has NIH grants and is Honoree for 2013 Innovator of the Year, Biz Journal Record.
Familiar with IEC62304 Medical Device Software Engineering Process, IEC60601-1 safety,
ISO9001/ISO13485 medical device quality system engineering process.
Builds on mobile wearable and SoC apps architect expertise, protocols,grad level course work at UT Austin in computer based medical instrument design and EE emphasis in medical electronics + microcontroller systems & software. From February 2013 to Present (2 years 9 months) Oklahoma CityCEO and System Architect: SysOnChip | AI IoT Quant | eBiomed | Control/SW/DSP/EEngineer @ Systems approach to data mining, modeling and design of distributed AI for any system with custom computer & signal processing: client-server IoT, ARM Microcontrollers, Real Time OS & apps, SOC of year System Architect, Control, Physiology Restoration, comm stacks, quant pattern recognition compounding algos for FX&CME. Product lifecycle to IPO & Mass Production in 150 factories. Led SigmaTel Sys On Chip portable AV media player SOC SW ($300M rev): SOC earned Austin's #1 IPO, acquired by Freescale. Design Projects: EKG; Oil E-Submersible Pump Control, Oil & Gas Petroleum Engr Well Optimization, VFDrives, SCADA, iOS, PLC ladder logic, system integrator; .NET, Altium PCB. EuroUSD+Stock Index algo @NYC hedge fund, SOC of yr: ZYNQ MPSoC Processing System Architect at XILINX. Freescale, protocols, DSP, gateway VoIP ATM stack & net architect, Voice over DSL software lead, ALU SONET, fiber, RSS-feed XML client-media on-demand in OO LUA- Sony PS+Windows, Embedded C/C++. My software is core of Apple iPod Shuffle, Dell, Creative, Samsung, 150 wearables. Expert flash IC memory, instrumentation, portable electronics: power/perf dynamics, Kinetis lowest power MCU. EE of med instruments, DSP+GUI at UT Austin biomed MSci courses. Any software & OS, custom analog, mixed-signal feedback control. Clients: HD Video sys for NASA at Motorola/Google, Air Force Air Intel Agency, UT Applied Research Labs IT (#1 supercomputer ‘08). Prior Offers: Lockheed F22 flight control software, FAA, Raytheon broadband DSP, Motorola basestation & phone, HP net. Software Architect: Matlab/C/Asm/C++/Lua/.NET/ObjC/Jscript, OS:Linux, WindRiver VxWorks, ThreadX, Solaris Unix, iOS, Win. CPLD/FPGA digital design. Consulting team's sys engineering expertise: C#, Java, PHP, Python, Win Embed. VP of Apps has 10 years at TI DSP apps & MIT physics PhD. MBA EE Biz dev consultant. Embedded software, networks, control systems, IT. Several PhD electrical and computer engineer design consultants. Call 405.979.0723 From May 2002 to Present (13 years 6 months) Collaborators in Dallas/Austin/SiliconValley/OKC/HK; Growth Strats:Chicago/NYCZYNQ Processing System Architect EE8, MPSoC, Reconfigurable Computing @ In Austin & San Jose: For 16nm Zynq MPSoC quad A53 & Zynq7 dual A9 All Programmable Sys On Chip SOC platform that won Silicon Valley Embedded System Conference best HW of show, EETimes SoC of yr, & best embedded processor 2012 by Microprocessor Report, ARM multi-core Apps CPUs, 128 bit accel, H.265, Mali GPU OpenGL, Xilinx 28|16nm programmable logic: Responsible for Processing System & Platform Architecture w/ market architects in aerospace & defense, wireless, automotive, video, high perf computing (HPC) investment & medical imaging defining IC/SW/Tools platform. Work w/ customer info, ARM's fastest processors +FPGA apps (#1 AI machine vision car collision avoidance, lane departure pattern recog DSP, Infotainment, MRI, Ultrasound, radar, sigInt, LTE/4G) & spec next solutions
- Developing ZYNQ MPSoC platform spec
- Coordinated IC/OS/middleware/tools platform definition
- Oversaw definition towards implementation
With marketing, IC & SW engineering execs:
- Implement platform strategy
- Balance biz objectives, industry & customers
- Optimize solution in budget & schedule
- Unify Software/HW programming model, Matlab/Simulink C gen, C to FPGA HLS synthesis, Vivado
- Align tools, platforms, ecosys strategies:
- OS partners, LINARo: LINux ARM Android
- Developed Roadmaps: AP SoC platform & IP
- Helped define strategic research goals of XILINX labs
- Support go to market
- Competitive Analysis for SOC/ASSP/ASIC & software
- Disruptive Tech: Can design on highest perf per watt platforms: ARM A53/15/A9/R/M, ZYNQ, Nvidia Tegra, Intel Atom,Quark, Apple A5/A6 iOS objective C, Samsung Exynos, TI Omap5 A15 Android, Freescale net, 16nm XILINX, Altera, Microsemi/Actel SmartFusion2
- Ensured robust software strategy & roadmap for code dev, deploy & re-use.
- Heterogeneous parallel OpenCL Compute Language, GPU & FPGA IP, Adapteva; supercomputing
http://files.shareholder.com/downloads/XLNX/0x0x725549/09e86935-29c6-488b-9969-b0fe18783d15/Analyst%20Meeting%20Final%202014.pdf From January 2011 to August 2011 (8 months) Silicon Hills (Austin) & Silicon Valley (San Jose)Member of the Technical Staff, Wearable Sys On Chip Software Engr IV @ For wearable DSP RTOS and apps with complex protocol comm, embedded database on Sold State Drives (SSD), developed SGTL/Freescale STMP37xx ARM 926 SOC apps, embedded firmware, device drivers, and USB/MSC/MTP/SCSI protocols as Windows & Linux device extensions. Utilized Express Logic Thread-X Real Time OS (RTOS) for portable low power multimedia mobile devices including new Sony Walkman. http://discover.store.sony.com/sportswalkman/ Solved complex SSD flash memory issues. Software development for multimedia host interfacing including SCSI, USB-Mass Storage, Rhapsody music on demand and MS Digital Rights Management DRM10, Familiar with SAN tech. Media Transport Protocol (MTP), MS automated test suites, Windows drivers, Windows server. Linux server config. Protocol analyzers. Our innovative mobile Digital AV Sys On Chip: www.rockbox.org/wiki/pub/Main/DataSheets/stmp37xx-ds-1-03.pdf
Group closed after product line IP integrated into Freescale similar parts. Received large payout as pre-IPO principal EE. SGTL options $0.75/share strike, hit $45/share peak. Invested proceeds and DSP skills in big data mining for best instruments, time frames, data visualizations, and pattern ID. Created Dynamic Logic Market Pattern Engine software with optimized growth compounding algos. From May 2008 to May 2009 (1 year 1 month) Austin - Silicon HillsPrincipal System On Chip Lead Software Engineer V @ Software engineering lead (2005+) for $300M revenue product line (150M DSP SOCs sold): Mixed-signal audio (DAC,ADC,CoDecs), Battery Charging, IO, Power Management, Perf Mgt (Dynamic Voltage and Frequency Scaling DVFS API design and patent defense) for Portable DSP AV Players: iPod, Samsung, Sandisk, Creative. Full SW lifecycle - concept to Mass Production. The 2005 Shuffle (Asus fab MP@100kU/day) is the most popular product using this DSP SOC & SW. >150 models used software I released. Lead & key developer of small team, developed production quality drivers, Real Time OS, & app that we used to capture 70% of world market share for flash MP3 players in 2004-2005 resulting in Austin's largest IPO and nearly $100M/quarter. SW codesign with our fabless mixed signal IC designers. Boosted flash chip IO perf & added flash models. ID and design SOC SW optimizations for IC fab variation (TSMC/Chartered/+). Supported lowest cost flash with a new design for triple-redundant fault tolerant flash driver recovering from errors w/o interrupting users. Authored patent-use documents & educated expert witness for successful US & ITC patent protection suits for power & performance management. Infringer Actions Semi products were then destroyed at U.S. border. Led, tasked a nimble distributed SW team (Austin, India, Hong Kong) with PhDs & SW techs resulting in high revenue. Optimized MPEG4 & WMV video on ARM CPU, and NV Flash on STMP37xx SOC. From March 2002 to May 2008 (6 years 3 months) Austin TexasVoIP Gateway Software Architect (VXWorks), Network Architect; CPE Linux Lead @ Custom protocol stack design on Freescale PowerPC Network Processors: Designed 4 & validated 7 layers of a complex class5 central office gateway's stack in VXWorks RTOS (Intel/WindRiver) using Real-Time-Protocol (RTP). Implemented custom stack layers: Socket/UDP/IP/IPoverATM from specs & Richard Stevens TCP/IP reference work on top of GenBand's ATM driver. Stack VOIP call quality 4.5 of 5 on first completed call then passed thousands of simultaneous calls and later ported to FPGA for massive sales. PPC & TI DSP array - parallel interprocessor comm. This telco CO class voice gateway bridged datacomm & telephony clouds in my net processor's interrupt handlers - mapping between domains efficiently with C macros. Stack used pre-calculated packet header fields. Designed ICMP IP connectivity tools including ping & ICMP echo reply. Cisco router config & packet debug.
As a next product, managed & led software & network engineering team for a Voice Over DSL home gateway with DSL-Ethernet bridging and Linux RTOS on an ARM+NetProcessor SOC (developed secure IP remote device mgt & UI). Designed & validated datacomm & telecom network architectures. New product line sold to Siemens Telecom. Voice quality analyzers of live VOIP and VoDSL calls routed to AT&T network indicated success - Demonstrated both new products to AT&T network architect, with live calls and LAN PC streams via ethernet IP to DSL bridge to DSLAM & ATM PVC switch then G6 media gateway and its AT&T leased T1 lines. Designed network bridged LAN stacks & paths to our DSL modem, DSLAM, ATM switch & Cisco router data gateway to validate both products. VOIP systems interop with cable modem networks & misc home gateways including Cisco and Polycom VoIP phones. G6 Carrier Media Gateway w/ my VOIP stack on FPGA:
www.genband.com/Home/Products/Media-Gateways/G6-Universal-Gateway.aspx From November 2000 to December 2001 (1 year 2 months) Austin, TexasNetwork & Media Processor Software Engineer @ Executed Motorola’s strategies for embedded networking and consumer markets. Cell phone inventor acquired by Google. Developed Internet Protocol-centric microprocessor apps, created first IP socket video on leading STB, networks, protocol dev, MPEG on PowerPC SoC’s, & Real Time OS software in global division for network processors and entertainment. Assisted on professional service customizations for US, Europe, Asia. Team launched Digital Set Top Box: Motorola Streamaster for HD MPEG on demand, LAN gateway, Internet Appliance; Physical layers: xDSL/ATM/OC3-Fiber. Precedes Moto/AT&T U-Verse; OS9000 Real-Time OS device drivers in C; multi-process sync; Embedded Software/HW integration on net processor media client SoC with 4 core DSP; Engineered client/server apps & Datacomm protocol software: TCP/IP, UDP A/V, Real Time Streaming Protocol (RTSP), Internet Gateway Management Protocol (IGMP) multicast channels, Ethernet driver, developed RFC1483 ‘ATM-DSL to Ethernet Bridging’ & RFC1577 IP over ATM/VDSL protocol stack; Cloud Engineering: Comm Peers configured: Globespan DSL, ALU, Marconi, Cisco, Sun Solaris. HD packet video sockets to Oracle DB on Solaris Unix servers via RTSP fed my PowerPC timer interrupt handlers which de-queued and pushed HD MPEG2 AV to quad DSP decoders; IEEE 802.11x Wi-Fi Ethernet Sys Integration: IGMP HD Multicast; I2C, SPI, IR driver, Freescale microcontroller system dev expertise. Markets: HD video & comm, gaming, DVD, audio, Internet appliance. Streamaster broadband digital set top box (DSTB) was Motorola’s first vertically integrated consumer portfolio – I.C.s, mainboards, OEM systems and client/server software. Customers included NASA. Won contract with Asian telecomm leader - deployed operational units on VDSL networks. Streamaster: www.iapplianceweb.com/appreview/set_top_box_13.htm From August 1998 to October 2000 (2 years 3 months) Austin - Silicon HillsOptical Network Engineering Coop @ Network engineering & related project management for MCI (d/b/a Verizon), Sprint, AT&T projects with low-latency fiber optic Digital Cross Connects and xDSL. Frequency Division & Time Division Multiple Access (FDMA, TDMA), Synchronous Optical NETwork (SONET), ATM concepts, ISDN, audio & video signals. From January 1997 to May 1997 (5 months) Richardson Texas - US Telecom corridorResearch Assistant III, Computer Science Department @ Unix System Administrator: Server load balancing & performance monitoring, Sun Solaris Unix Device Driver updates in C++ for a robotic arm storage system. World's faster super computer was here in 2008. UTexas research lab helped invent GPS & SONAR. From August 1996 to January 1997 (6 months) Austin, TexasSoftware & Network Engineering Intern @ Air Intelligence Agency (AIA with Mach3 SR-71 blackbird onsite) : OpenGL C programming on Silicon Graphics (SGI) workstations, Fiber optics training, Attended Artificial Intelligence (AI) & pattern recognition training seminar. USAF squadron webmaster. From June 1996 to August 1996 (3 months) San Antonio, Texas, Kelly AFB
B.Sci.+ M.Sci. courses, Electronics Engineering, Systems & Software, Processors, Control, Biomed Instrument, Finance, Entrep, GPA 3.51 / 4 @ The University of Texas at Austin From 1996 to 1998 Electrical Engineering @ University of Oklahoma From 1993 to 1995 Jonathan Nesbitt is skilled in: Optimization, Embedded Software, Embedded Systems, Software Engineering, SoC, RTOS, FPGA, Microcontrollers, C, Medical Devices, ARM, Algorithms, Firmware, Device Drivers, C++, Xilinx, Digital Signal..., Linux, Technical Marketing, Processors, Embedded C, Debugging, Wireless, VoIP, iOS development, Systems Engineering, Multimedia, Embedded Linux, Real Time, Electrical Engineering, PCB design, Oil/Gas, Entrepreneurship, System Architecture, Petroleum Engineering, Distributed Systems, Control Systems Design, PLC Ladder Logic, Product Lifecycle..., Protocol Stacks, Quantitative Analytics, SCADA, Automation, Network Engineering, Windows Server, .NET, Algorithmic Trading, Futures, DSP, Matlab, Simulink...
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