Bartosz Wasilewski's Email Addresses & Phone Numbers

📖 Summary

I am looking for a new assignment on a contract basis to start from November 2015, in the UK, or EU (with good flight access for weekly commute). Working from home office is also possible. I offer a considerable experience in embedded system signal processing, in particular fixed point digital signal processing, 24-bit audio processing, mobile Physical Layer WCDMA, LTE baseband algorithms, RF control loops, and audio echo and noise cancellation as well as spatialisation and equalisation. I can take an idea from concept through numerical simulation, including modelling end-to-end communication and propagation channel characteristics, to implementation/integration on target using C. I also quite enjoy designing and implementing retrofit solutions to address existing signal processing issues. Key skills: Fixed point algorithm implementation. Fixed point implementation of Audio algorithms, Echo Cancellation, Noise Reduction, Echo Suppression, Centre Channel Extraction. Algorithm design, embedded system integration (physical layer), live system troubleshooting and signal quality control, cellular, WCDMA, LTE/OFDM , control loop development and modem and system optimisation. SDR, Wireless, Physics, Control Systems, Sensors, Channel Estimation Experience in handling of large software projects (e.g. updates of 300+ DSP files in 2000+ file baseline). C code for FPGA verification, test vector specification and generation. Background in physics and computer modelling, electronics as a hobby since High School. Embedded/ANSI C, fixed point, Matlab,ClearCase, Source Insight, integrated build environment. SVN, Clearquest, TI Code Composer, C64/C64+ , WCDMA, LTE, MIMO, MBMS, MultiCarrier, Specialties: Problem solving, Troubleshooting signal quality problems on live systems, Robust and efficient algorithms and control loops, measurement verification.Algorithm & DSP Engineer @ I am looking for a new assignment on a contract basis to start from November 2015, in the UK, or EU (with good flight/car access for weekly commute). Working from home office is also possible. For past 10+ years, I have been running an independent consultancy offering software and hardware design and development services. Current activities center around R&D algorithms and embedded systems. I have a proven track record addressing existing signal processing and performance issues, designing and implementing algorithms that retrofit well into existing system, and generating valued IPR in the process (2 patents granted). From June 2005 to Present (10 years 7 months) Senior DSP Engineer @ Development of reference 24-bit fixed point software for audio spatialisation, including LMS Echo Cancellation, Noise Removal, Acoustic Echo Suppression, Centre Channel Extraction and others. Extended existing in-house floating point ECNR simulator to allow for testing fixed point blocks either independently within floating point chain, or as a full fixed point chain. Performance optimisation using intrisincs and macros, allowing to target several different audio DSPs, e.g. Emerald and HiFi2. Improvements into existing algorithms e.g. new LMS divergence detection and RNG for AES. Particular stress on precision and quality of fixed point audio processing, with good results. Innovative fixed point implementations of division, square root, logarithm and exponent, using Newton-Raphson as well as interpolation. Work on site and remotely from home office. Contract extended. From March 2015 to October 2015 (8 months) Paris Area, FranceSenior Researcher, Consultant @ Design and development of LTE Base Station UL front end DSP algorithms including PRACH, PUCCH and PUSCH reception, channel estimation and equalisation, timing and frequency control. Processing uplink captures, assisting FPGA development on sample rate conversion and filtering - provision of fixed point processing algorithms and test vectors, advising on numerical test methodology for HW as well as cellular network fundamentals. 3 month contract, extended once. From March 2014 to October 2014 (8 months) Cambridge, United KingdomSenior DSP/Algorithm Engineer, Consultant @ 07.2010 – 04.2013 Aeroflex Limited in Stevenage, UK. Designed, implemented and integrated QAM64/MIMO channel estimator / equalizer, time tracking (ATC), AFC and AGC functionality for TM500 WCDMA test mobile, in Matlab and in C on TI DSP cards. Investigated different estimator structures to obtain best QAM64/MIMO throughput under E-VAM. Introduced vector visualisation of MIMO related measurements to aid customer investigations. Cooperation with FPGA team to implement the improved equalizer. Supported implementation of diversity related features of TM500, supported design of new radio card in WCDMA related areas (DC offset removal, dynamic range, digital gain). Development of new search and initial acquisition WCDMA algorithms for future product. Explaining WCDMA performance opportunities and limitations. Improving signal processing performance of existing Physical Layer code (reduced number of false grant detections on HSSCCH, reduced BLER for QAM64/MIMO). TI DSP, ANSI C, Matlab, Clearcase, ClearQuest. From July 2010 to April 2013 (2 years 10 months) Senior DSP/Algorithm Engineer, Consultant @ 09.2007–06.2010 (ST)-Ericsson in Nuremberg, Germany. LTE Physical Layer development. Control loop algorithm design, development, integration and testing. Invented a novel concept for Time Tracking (ATC) loop, AFC and AGC functionality for ST-E PC Sally and Sally modems using SMARTi RFICs. Supervision of AGC, AFC, ATC test activities, trace and raw data based monitoring of modem performance quality. Channel estimator driver design, implementation, integration and verification, algorithm review. Contributed to Path Loss and Delay / Doppler Spread algorithms. WCDMA MultiCarrier prototype development, system specification, L1 system design specification, DigRF interface compatibility and radio manager software architecture. Study of SMARTi, and MOA RF transceiver structure, algorithms, and DigRF programming model differences. System test specification outline. HSPA Evo algorithm and Matlab simulation development, front end, QAM16 / QAM64 MIMO channel estimation, parametric and non parametric algorithms optimisations. TI DSP C code optimisations. Efficient Embedded C coding using own fixed point macros and TI intrinsic functions. Saved 30%+ DSP cycles in 1 day. Link adaptation, SINR measurements and reporting algorithm development (CQI selection). Reports on simulation results and algorithm performance. Contributions for channel estimation adaptation and measurements (2 joint patent proposals submitted, 1 patent filed). 04.2007 – 09.2007 Ericsson R&D in Lund, Sweden. Development of Physical Layer software for MBMS UE product. Analysis and fixes to BTFD and turbo decoder. 06.2006 – 03.2007 Ericsson Prototype Unit in Nuremberg, Germany. Developed 100% of Phy L1 software extensions for MBMS UE prototype (Berta). Testing using R&S CMU/CRTUW. From June 2006 to June 2010 (4 years 1 month) Senior DSP Engineer, Consultant @ 06.2005 – 05.2006 Agere Systems / Optimay in Munich, Germany. Agere 2.5G DSP and L1 code, ModemArt 3G L1 controller code. Maintaining GSM DSP/L1 and 3G PHY L1 regression test. Multi-site, multi-cultural environment. From June 2005 to April 2006 (11 months) Modem Systems Engineer @ Completed 7 projects, in roles of DSP engineer, mathematical modeller, test engineer, customer support, mentor for junior engineers and system consultant. Development, integration and testing of algorithms for real time hardware in 3G WCDMA handsets. Activities included: Analysis of 3GPP standards and requirements. Creating NodeB / Propagation Channel Mixed Signal Rake WCDMA signal path simulator in C. System design, link budget, level maps. Detailed linear and non-linear distortion models. RF receiver performance simulation. Radio filter optimisation. Setting up and maintaining in-house 3G specifications search engine prior to 3GPP efforts. Specification, design and development of mixed signal and control loop algorithms (Matlab, C). 1 patent granted WO2004042934. System simulation. Evaluation of performance margins. Bit exact modelling in C, fixed point algorithm implementation. Creating parallel computing environment used to run multiple performance simulations. Ownership and maintenance of the WCDMA simulator. 3G system Layer 1 hardware/software integration and validation. Version control ( Perforce, PVCS ) on-site support (6 months) for Toshiba. Helping the customer to pass GSM/GPRS GCF acceptance testing. Liaising with internal HW and SW development teams. Personal commendation from customer. Troubleshooting reference hardware. Specifying new test cases based on field trials. Detailed DVB-H feasibility study, comparative digital TV report and presentation Co-design of core algorithms for a security module (simlock). HSDPA receiver architecture and algorithms investigation. Design of adaptive algorithms for control loops (AGC, AFC, SIR target estimation and power control, noise estimation, adaptive channel estimation, adaptive path scaling and interference cancellation, diversity schemes). System tuning and optimisation. Phase noise investigation. Filter distortion investigation. System adaptations to suit customer RF requirements. From December 2000 to June 2005 (4 years 7 months) Research Scientist @ Design of systems performing diverse tasks in adverse environmental conditions. 2 projects, remote ultrasound telemetry in oil wells and remote sensing vehicle chassis movement simulation for minefield clearing. System specification and simulation using Matlab. One patent application. Contract research. From July 2000 to November 2000 (5 months) Research Scientist @ Development of Optical PLLs as part of THALES project. Design and implementation of a microwave sub-system. Development of designs for MMICs using HP ADS and Microwave Harmonica. One patent application. Contract research. From July 1999 to July 2000 (1 year 1 month) Ph.D, Physics, Optoelectronics and Laser Engineering, Department of Physics @ Heriot-Watt University From 1991 to 1996 M.Eng(Hons), Telecomms and Electronic Engineering, Mobile Communication Systems, 1:1 @ Wroclaw University of Technology From 1991 to 1996 B.Eng(Hons), Communications and Electronic Eng., 1:1 @ Northumbria University From 1994 to 1995 High School, Maths/Physics/English @ XIV LO, Wroclaw, Poland From 1987 to 1991 Bartosz Wasilewski is skilled in: Digital Signal Processors, Embedded Systems, Signal Processing, LTE, Wireless, Simulations, Algorithms, Matlab, PHY, ANSI C, Mobile Communications, Fixed point arithmetics, WCDMA, MIMO, RF, 3GPP, Digital Signal Processing, HSPA