Top Circuit Design Engineers in San Jose, California
Omer Khayam
IBM Graduate Research Fellow
San Jose, California
IBM Graduate Research Fellow
Data Center Optics
Research Engineer
Staff Optical Systems Engineer
Staff Optical Reliability Engineer
Sr. Photonic Integrated Circuit Design Engineer
Institut d'Optique
École des Ponts Business School
Ecole polytechnique
Recommendations: 0
Optoelectronics
Photonic Integrated Circuits
Photonics
Optics
Semiconductors
Optical Communications
Simulations
Fiber Optics
k****[email protected]
Lakshminarayanan Sadagopan
Circuit Design Engineer
San Jose, California
Circuit Design Engineer
Senior Software Engineer
Senior Engineering Manager
Engineering Manager
Engineer, Staff II
Alumni
University of Florida
Recommendations: 0
Python
Django
SQL
Shell Scripting
Scripting
Tableau
PHP
JavaScript
l****[email protected]
Young Nguyen
Circuit Design Engineer (System I/O and Embedded Memory)
San Jose, California
Circuit Design Engineer (System I/O and Embedded Memory)
Software Engineer, CloudTest
Software Engineer Intern
Research Assistant
Software Engineer II
PSG Software Intern
Santa Clara University
University of California, Berkeley
Recommendations: 0
Matlab
Embedded Systems
Semiconductors
FPGA
Verilog
Circuit Design
SPICE
Cadence
r****[email protected]
young kim
Staff Circuit Design Engineer
San Jose, California
Staff Circuit Design Engineer
analog staff engineer
Analog Technical Staff engineer
Senior Analog design
Senior Analog Circuit Design
Circuit & Layout Design Engineer
Circuit & Layout Design Engineer
Circuit Design Consultant
Pusan National University
Recommendations: 0
Verilog
Semiconductors
Analog Circuit Design
Layout and Layout...
Circuit Design
PLL
SPICE
LVS
k****[email protected]
Frank Theo
Design Manager, Silicon Implementation Group
San Jose, California
Design Manager, Silicon Implementation Group
Consultant
Sr. Member of Technical Staff
Senior Design Engineer, Microprocessor Group
Circuit Design Engineer, Microprocessor Group
Staff Design Engineer
Software Developer
Staff Design Engineer
Member of Technical Staff
Senior Engineer (Band 9)
The Ohio State University
University of Arizona
Recommendations: 0
Circuit Design
SoC
IC
Verilog
Semiconductors
VLSI
CMOS
Static Timing Analysis
f****[email protected]
