Vijay K’s Email & Phone

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Vijay K

Staff Verification Engineer @ Qualcomm

Vijay K Contact Details

San Francisco Bay Area
Staff Verification Engineer @ Qualcomm
Intern @ Atria Logic Inc.
ASIC Verification Engineer @ Micron Technology
@ Visvesvaraya Technological University

• Possess good knowledge on ASIC micro-architecture design, verilog coding, logic design, and synthesis flow. • Experience in digital circuit design: CMOS schematic and layout design using Cadence virtuoso tool. • Test bench set-up for Ethernet 802.3 verification in verilog using modelsim. • Practice in hardware debugging using logic analyzer, Signal Tap, Oscilloscope. • Hands on experience 

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