Innovative technology professional with 4 years of broad expertise partnering with cross-functional teams to implement solutions for successful RTL design, verification and validation in semiconductor industry. An energetic, result oriented, highly organized and proven skilled problem-solver. Better understanding of technical trends, architectures and highly motivated to work with latest tools and technologies. Core Strengths include: RTL Design, Post Silicon verification/validation, Debug/Triage, CPU Architecture, ASIC/FPGA, VHDL/Verilog/SystemVerilog, C/C++, Python, EDA tools

Server System Validation Engineer @ ► Working on CPU Power Management validation for Xeon Server Processor family, including turning design documentation into validation test plan, writing test cases, developing test scripts for automated/manual test environments using Python and executing them in emulation/post silicon environments. ► Collaborates with architects, design engineers and other team members to ensure high quality of test plan, better functional coverage and comprehensive test contents. ► Determines BIOS requirements needed for validation, and handles debug and triage failures, documenting failures in bug tracking database and driving them to closure; prepares Post Silicon Power-On and Test Execution plans. From July 2012 to Present (3 years 4 months) Columbia, South Carolina AreaResearch Engineer @ ► Developed modules for decoder and control signal generator using VHDL on Xilinx FPGA XCV600-6HQ240, implementing software defined hardware module Control Signal Generator (CEG) for radar controller of pulsed RADAR application. ► Created high-density, high-layer count printed circuit board layouts as per design standards for power supply board of payload, acquiring hands-on experience with schematic capture, symbol creation, placement, connection and netlist generation. From 2006 to 2007 (1 year) Ahmedabad Area, IndiaIntern @ ► Designed and implemented continuous monitoring Digital pH meter with temperature compensation and data storage for commercial purpose using ATMEL 89c51 Microcontroller chip, pH sensor, temperature sensor, ADC, LCD and external EPROM. ► Instituted electro-mechanical system which counts number of object passes on conveyor belt using proximity sensor, LCD and external ADC interfaced with assembly programmed ATMEL 89c51 Microcontroller. ► Built prototype of Elevator system with nut-bolt mechanism using assembly programmed ATMEL 89c51 Microcontroller chip, seven segment display, push button switches and LEDs. From 2006 to 2006 (less than a year) Ahmedabad Area, India

Master’s Degree, Computer Engineering, 3.75 @ George Mason UniversityBachelor’s Degree, Electrical, Electronics and Communications Engineering, 3.84 @ Gujarat University Kinjal Shah is skilled in: Computer System..., Functional Verification, FPGA, ASIC, VHDL, Power Management, Verilog, Python, C, Semiconductors, UVM, SystemVerilog, C++, Xilinx ISE, Active-HDL, Synopsys tools, RTL Design, Embedded Systems, Testing, x86 Assembly