Dawei Wang’s Email & Phone

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Dawei Wang

Senior ASIC/FPGA Design Engineer @ Institute of Computing Technology, Chinese Academy of Sciences

Dawei Wang Contact Details

Location:
San Francisco Bay Area
Work:
Senior ASIC/FPGA Design Engineer @ Institute of Computing Technology, Chinese Academy of Sciences
FPGA Acceleration Engineer @ Virtu Financial
Senior Research Associate, Instructor @ Illinois Institute of Technology
Education:
About:

A hardware engineer focusing on ASIC/FPGA logic design and verification, system circuit board design/testing, and embedded software/firmware development.

Staff ASIC Design Engineer @ Conduct Ethernet Subsystem architecture, module micro-architecture design and implementation with several front-end flow steps until chip tapes out and responsible for chip bringup. Detail responsibilities: 1) Write function specification of Ethernet Subsystem, which includes interface 

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