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Stephen MInstP

Senior FPGA Engineer

Senior FPGA Engineer at Bruel & Kjaer Sound & Vibration Measurement A/S

London, United Kingdom

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Stephen MInstP's Email Addresses & Phone Numbers

Stephen MInstP's Work Experience

Bruel & Kjaer Sound & Vibration Measurement A/S

Senior FPGA Engineer

March 2014 to Present

Stephen MInstP's Education

Cardiff University / Prifysgol Caerdydd

University College London, U. of London

Haverstock School, London and Kingsway Princeton College, London

Stephen MInstP's Professional Skills Radar Chart

Based on our findings, Stephen MInstP is ...

Calm under pressure
Competent
Conceptual

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56% Left Brained
44% Right Brained

Stephen MInstP's Estimated Salary Range

About Stephen MInstP's Current Company

Bruel & Kjaer Sound & Vibration Measurement A/S

A member of the senior technical team within the R&D department, responsible for all firmware design and development within B&K's Royston site: Including 'hands on' Verilog design of Altera FPGA devices, development of Synopsis Design Constraint timing files and the use of the Verilog Procedural Interface (VPI) of the Programmable Language Interface (PLI 2.0) with 'C' to...

Frequently Asked Questions about Stephen MInstP

What company does Stephen MInstP work for?

Stephen MInstP works for Bruel & Kjaer Sound & Vibration Measurement A/S


What is Stephen MInstP's role at Bruel & Kjaer Sound & Vibration Measurement A/S?

Stephen MInstP is Senior FPGA Engineer


What is Stephen MInstP's personal email address?

Stephen MInstP's personal email address is s****[email protected]


What is Stephen MInstP's business email address?

Stephen MInstP's business email addresses are not available


What is Stephen MInstP's Phone Number?

Stephen MInstP's phone +44 ** **** *182


Who are Stephen MInstP's colleagues?

Stephen MInstP's colleagues are Kung Nhim, Tony Spica, Johannes Steingrund, Jonas Olesen, and Per Rasmussen


About Stephen MInstP

đź“– Summary

A chartered scientist, chartered physicist, a member of the Institute of Physics and a senior digital (FPGA/ASIC/CPLD) design engineer with 10 years plus experience in industry and 5 years plus experience designing and developing my own products. I hold a postgraduate masters, M.Sc., in Electronic Engineering (Specialising in Digital Systems) from Cardiff University and a B.Sc. joint honours degree in Physics with Electronics and Computing from UCL (University College London).Senior FPGA Engineer @ A member of the senior technical team within the R&D department, responsible for all firmware design and development within B&K's Royston site: Including 'hands on' Verilog design of Altera FPGA devices, development of Synopsis Design Constraint timing files and the use of the Verilog Procedural Interface (VPI) of the Programmable Language Interface (PLI 2.0) with 'C' to functionally design prove Verilog designs. From March 2014 to Present (1 year 9 months) Stephen MInstP is skilled in: ASIC, FPGA, VHDL, Verilog, Hardware Architecture, Static Timing Analysis, C, Hardware Design, Logic Synthesis, ModelSim, NCSim, Digital Signal Processors, Synopsys tools, SoC, Simulations


Stephen MInstP’s Personal Email Address, Business Email, and Phone Number

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In a nutshell

Stephen MInstP's Personality Type

Introversion (I), Intuition (N), Thinking (T), Judging (J)

Average Tenure

1 year(s), 9 month(s)

Stephen MInstP's Willingness to Change Jobs

Unlikely

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