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San Francisco Bay Area
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Fifteen years of micro-architecture, logic, verification and physical design experience in low power, complex, high-speed, high-performance microprocessors. Specialties: Design L2 memory subsystem Design complex core pipeline design

CPU Microarchitect @ From June 2015 to Present (7 months) San Francisco Bay AreaCPU Microarchitect @ Developing world's first VISC CPU cores. MMU From June 2014 to May 2015 (1 year) 

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