Senior Engineering Manager
Palo Alto, CA
3D Graphics Lead Engineer
June 2015 to October 2015
665 3rd st San Francisco, CA
GPU Performance Engineer
November 2014 to June 2015
3D Graphics C++ Functional Simulator Software Developer
October 2012 to November 2014
3D Graphics Hardware Design Engineer
December 2008 to October 2012
Researcher in Computer Architecture
July 2008 to December 2008
Web Development Team Lead
March 2008 to December 2008
March 2008 to July 2008
Ford Motor Company
Research Engineer - Compute Platform Architecture
December 2015 to May 2017
Palo Alto, CA
What company does Mohamed Ahmad work for?
Mohamed Ahmad works for Luminar Technologies
What is Mohamed Ahmad's role at Luminar Technologies?
Mohamed Ahmad is Senior Engineering Manager
What industry does Mohamed Ahmad work in?
Mohamed Ahmad works in the Automotive industry.
Senior Engineering Manager @ Luminar Technologies Palo Alto, CA3D Graphics Lead Engineer @ Naked Labs Employee #3 at early stage startup in San Francisco. Naked Labs is developing a 3D scanning smart scale that tracks your shape instead of just your weight. Your body is scanned with infrared sensors to create a 3D model. A mobile device app will render your body model and measurements that provide insights to track the results of your workouts and diets. Measurement algorithms will provide the user with changes down to the millimeter of all their body parts and personal trainers can help them target the areas that need improvement. Implemented computer vision depth map fusion application to reconstruct a 3D model of objects scanned with infrared sensors from 360 degrees. Architected a solution to simulate camera tracking (SLAM) for our fusion application. Profiled software performance of the stereo vision depth sensors executing on the CPU. Technical Lead for a mobile app that will receive the 3D model from the scanner wirelessly and render the model in OpenGL. Pitched and built relationships with investors. From June 2015 to October 2015 (5 months) 665 3rd st San Francisco, CAGPU Performance Engineer @ Intel Corporation Modeling, measuring, analyzing, and projecting performance for Intel's GPU product roadmap. Leveraging my RTL and u-arch design skills along with my sw development experience to measure and analyze the sensitivities of a GPU to modern benchmarks and game title workloads, such as memory bandwidth. Presenting the analysis to product architects and product managers and providing feedback on what studies should be conducted to win customers. From November 2014 to June 2015 (8 months) Folsom, CA3D Graphics C++ Functional Simulator Software Developer @ Intel Corporation Texture Sampler Team - C++ Functional simulator Developed C++ hardware functional simulator code for texture decompression Implemented the algorithm for decompressing HDR and LDR 2D/3D ASTC textures (Advanced Scalable Texture Compression) for OpenGL 4.3/ ES 3.0 Fixed bugs in memory management for loading 3D images with LODs. Developed a D3D11 application to decompress Microsoft compressed textures (BC1-7) using the GPU or CPU, and compress them using the CPU (sw encode). Developed Java for a KTX file viewer – viewing cubes unfolded, traversing through slices of a 2D array, and viewing miptails. From October 2012 to November 2014 (2 years 2 months) Folsom, CA3D Graphics Hardware Design Engineer @ Intel Corporation Texture Sampler Team – Visual and Parallel Computing Group o 3D Graphics Hardware RTL design and validation (3rd Rotation and Final Placement) Lead the design of 3D surface decompression features such as Ericsson Texture Compression formats and Hierarchical Depth resolve.• Wrote microarchitectural details for each unit and their interfaces.• Drove each unit owner to complete high quality and timely designs Designed RTL in System Verilog and validated for • Sampler state and surface state cache• 3D surface decompression (Ericsson algorithm, Hierarchical Depth) From December 2008 to October 2012 (3 years 11 months) Folsom, CAResearcher in Computer Architecture @ Intel Corporation Oregon Microarchitecture Lab – Corporate Technology Group (July 23, 2008 – Nov 26, 2008) 4 month Rotation in Intel Rotation Engineer Program at Hillsboro, OR site Resilient Microarchitecture – expanding the dynamic operating range of the chip Researched detection of an error in the ALU using residue number system ECC Derived an algorithm for ECC using multiple low cost moduli residue codes Inserted a pipeline stage to implement ECC in the C++ x86 arch perf simulator Estimated the performance impact of inserting this stage From July 2008 to December 2008 (6 months) Hillsboro, ORWeb Development Team Lead @ Intel Corporation Team Lead of 8 web developers working on an internal website for the program Primary duties were team management, project roadmaps, SCRUM master In addition to management, my technical duties included Prototyping new design styles and features Developed features in C# and ASP.NET Front end code for home page, user profile, career development Middle – Implemented library classes for querying DB with filters Back End - Maintained/modified DB architecture (MS SQLserver2000) Resolved bugs and client requirement changes From March 2008 to December 2008 (10 months) Hillsboro, ORSoftware Engineer @ Intel Corporation Apple Software Enabling Team – Software Solutions Group (Mar 17, 2008 – July 17, 2008) 4 month Rotation in Intel Rotation Engineer Program at Folsom, CA site. OpenCV Face Detection Project – Analyzing Scalability to 8 cores Added performance measuring code, modified code to enable benchmarking Refactored a face detection application to be multi-threaded using Intel TBB. Designed and implemented a heuristic data structure and algorithm to reduce false positives in face detection (sliding window) Gathered performance analysis data to present at Apple WWDC 2008. From March 2008 to July 2008 (5 months) Folsom, CAResearch Engineer - Compute Platform Architecture @ Ford Motor Company Defining the silicon architecture for the automotive grade compute platform. Researching and developing hardware acceleration using ASICs, FPGAs, GPUs, and CPUs. Software development related to hardware acceleration in C, CUDA, and OpenCL. Benchmarking commercial off the shelf solutions such as Nvidia DrivePX. Authoring and co-authoring invention disclosures for autonomous vehicle related patents. From December 2015 to May 2017 (1 year 6 months) Palo Alto, CA
Introversion (I), Intuition (N), Thinking (T), Judging (J)
1 year(s), 3 month(s)
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