Mohamad Tisani's Email Addresses & Phone Numbers

Sr. ASIC SYSTEM VALIDATION Manager APPLICATION ENGINEERING | VALIDATION ENGINEERING | HARDWARE ENGINEERING Systems Engineering professional with strong record of success building and managing flexible, cost-effective, computing environments within matrixed organizations. Expert in multiple Architectures as such: - Pentium based PCs and Servers - ARM based 2G/3G/4G Cellular Phones - MIPS RISC data networks systems. Support multiple...

Sr. ASIC SYSTEM VALIDATION Manager APPLICATION ENGINEERING | VALIDATION ENGINEERING | HARDWARE ENGINEERING Systems Engineering professional with strong record of success building and managing flexible, cost-effective, computing environments within matrixed organizations. Expert in multiple Architectures as such: - Pentium based PCs and Servers - ARM based 2G/3G/4G Cellular Phones - MIPS RISC data networks systems. Support multiple interfaces including LPDDR II, LPDDR III, PCIe, eMMC, SDIO, and MIPI. Keen ability to motivate and provoke passion for organization, mission, and excellence. Diplomatic leader with talent for building and cultivating strategic partnerships. Repeatedly awarded ascending levels of responsibility and accountability to meet changing operational needs. Areas of expertise include: Risk Management ▪ Regulatory Compliance ▪ Performance Optimization ▪ Strategic Planning Supervision & Leadership ▪ Cost Controls & Reduction Strategies ▪ Root Cause Analysis ▪ Global Relations Global Customer Support TrainingSr. Manager Design Validation & Test Engineering @ • Teamed with senior leadership and other key stakeholders to spearhead all levels of projects related to processes, staffing, procedures, and influential points of contact to meet specialized objectives. Oversaw pre-Silicon and Silicon validation efforts as well as SOC characterization over process, voltage, frequency, and temperature for cellular baseband SOC. Analyzed current and future infrastructure technology needs to deliver superior maintainability, reliability, and scalability prior to constructing test plans. Recommended technical solutions to resolve critical production ramp issues. Notable career progression in appreciation of exceptional performance and leadership ability. Automated all chip characterization tests to minimize chip characterization time, reducing characterization time by 30 % while simultaneously performing 2 chip characterization projects instead of one. Conceived and deployed multiple test and characterization plans for pre and post silicon validation for multiple domains including modem, LPDDR, PCIe, power management, concurrency, and other peripherals. Developed Superior DVT Characterization Hardware Platform for Automated SOC Characterization over Process, Voltage, Frequency, and Temperature. Validated LTE modem, Octal A53, complex power management schemes, efficient graphics, video, and image processing, managing multiple cellular SOC initiatives to deliver best-In-class palladium and FPGA-based emulation validation for pre-Silicon. Prepared and presented SOC validation and system characterization reports to Tier-one customers to release design wins to production. 100% of projects completed ahead of schedule. Devised and initiated Close-the-Loop program in order to minimize Customer escape SOC bugs. From June 2005 to Present (10 years 7 months) Director of Applications Engineering @ Revolutionized department to deliver scalable strategy across infrastructure products and features. Provided technical leadership for design, architecture, and administration, identifying problem areas and preserving system integrity. Managed multiple teams dedicated to building and preserving core infrastructure. Constructed budgets to ensure capacity after evaluating and integrating new technologies and industry best practices. Achieved major improvements in customer support operations through stricter compliance with policies and procedures. Regularly visited and collaborated with customers in United States, Asia, and Europe to ensure Pericom products retain appropriate features. Delivered Results: Authored manual to build notebook PCs and servers using Pericom products. Pioneered development data sheets, applications notes, layout guidelines, and cellular phone and set top box design guides, dramatically improving service transition and service delivery. Designed PCI, PCI-X, and PCI Express bridge validation and reference boards as well as PCI-X four-port gigabit Ethernet card. Initiated comprehensive training initiative, including PowerPoint presentations, for sales team. Orchestrated and executed validation and compatibility plans to ensure bug-free products, using analyzers/exercisers and SCSI, SATA, gigabit Ethernet and other existing applications. Employed FPGA to emulate PCI Express and PCI-X products for system validation. From 1999 to 2005 (6 years) Application Engineering Manager @ Managed the Application Engineering team for the RISC Processor Division From January 1997 to June 1999 (2 years 6 months) Systems engineering Manager @ Managed the system engineering group From January 1989 to January 1997 (8 years 1 month) MSEE, Electronics @ Santa Clara University From 1986 to 1988 BSEE, Electronics @ University of California, San Diego From 1984 to 1986 Mohamad Tisani is skilled in: Testing, Semiconductors, Wireless, SoC, Functional Verification, Systems Engineering, ASIC, Debugging, Embedded Systems, IC, FPGA, Embedded Software, Analog, PCB design, RF