Matthew Applegate's Email Addresses & Phone Numbers

Experienced multidisciplinary scientist with a proven track record of innovation. A passionate problem solver possessing a very strong mathematical and analytical background with significant strengths in information theory, probability theory, and statistics. Outstanding software engineering skills, fluent and experienced at programming in all major languages. Outstanding hardware engineering skills with both front-end and back-end experience as well...

Experienced multidisciplinary scientist with a proven track record of innovation. A passionate problem solver possessing a very strong mathematical and analytical background with significant strengths in information theory, probability theory, and statistics. Outstanding software engineering skills, fluent and experienced at programming in all major languages. Outstanding hardware engineering skills with both front-end and back-end experience as well as experience in a clean room. Accomplished researcher and developer in the area of microprocessor design and noted author on the global IEEE standard for floating-point arithmetic (IEEE 754R). Multidisciplinary publications pending from research conducted during PhD.PhD Researcher @ My research has been concerned with the implementation of a quantum random number generator based on photon number detection. Notable achievements/publications: 1. The design, fabrication, measurement and modelling of single-photon detectors. 2. The research and development of an accurate mathematical model of photon detection in multiplexed detectors. 3. The research and development of a room-temperature quantum random number generator based upon using a photon-number detector to measure the coherent states of light generated by a pulsed laser. A tantalising prospect for high-rate random number generation required for many applications, and specifically for the cryptographic application of quantum key distribution. Applegate, M. J. et al. Efficient and robust quantum random number generation by photon number detection. Appl. Phys. Lett. 107, 071106 (2015). http://scitation.aip.org/content/aip/journal/apl/107/7/10.1063/1.4928732 4. Solving a long standing problem of how to efficiently convert a sequence of statistically independent outcomes described by an arbitrary probability distribution into a sequence of random binary bits described by the uniform distribution. In so doing a hitherto unknown generalisation of the earlier work of John von Neumann was discovered. 5. The development of a new mathematical method to test for randomness and correlation that is stronger than an autocorrelation. From October 2010 to Present (5 years 3 months) Senior Custom Silicon Engineer @ Responsible for the research and development of a proprietary e-paper display micro-controller targeted at a mass-volume consumer e-reader. The function of the controller was to present a standard active matrix display interface to a CPU in order to seamlessly drive a proprietary e-paper display built upon a plastic backplane. Active in all parts of the research and development cycle: design, implementation and verification. Used Altera FPGA synthesis tool Quartus, logic simulator ModelSim, and designed in Verilog. From April 2009 to October 2010 (1 year 7 months) Cambridge, United KingdomSenior VLSI Engineer @ Responsible for the research and development of a multiplexed CPU interface, as well as a bespoke DDR/DDR2 memory interface. Active in all parts of the research and development cycle: design, implementation and verification. Used Altera FPGA synthesis tool Quartus, logic simulator ModelSim, and designed in VHDL. From August 2007 to January 2009 (1 year 6 months) Design Engineer Advanced @ Responsible for the research and development of memory interfaces to Altera FPGAs. Specifically my research focussed on DDR/DDR2 SDRAM interfaces and error correction codes. Used Altera FPGA synthesis tool Quartus, logic simulator ModelSim, and designed in VHDL. Designed and implemented the entirety of the auto-calibration controller for DDR/DDR2 interfaces enabling superior bandwidth and signal integrity, whilst also saving the need for Static Timing Analysis. From October 2005 to August 2007 (1 year 11 months) Member of Technical Staff @ Researched and developed algorithms to efficiently implement mathematical operations in logic finding application in high profile CPU/GPUs (Intel, AMD, Nvidia, ATI). Specifically my research focussed on fixed and floating-point arithmetic functions as well as on logic minimisation and optimisation. Used ASIC synthesis tools: Design Compiler, RTL Compiler and Power Compiler, place-and-route tool Physical Compiler, logic simulator ModelSim, and designed in Verilog and VHDL. From June 2003 to October 2005 (2 years 5 months) Doctor of Philosophy (Ph.D.), Physics @ University of Cambridge From 2010 to 2015 First class honours (1st) in Computer Science (Hons), Computer Science, Maths, Physics @ University of Warwick From 2000 to 2003 Matthew Applegate is skilled in: Research, Optics, Algorithms, FPGA, Semiconductors, Software Engineering, Visual Studio, C, C++, Perl, Linux, Python, Java, Programming, Verilog