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James Keithan

Design Verification Engineer @ MIT Lincoln Laboratory

James Keithan Contact Details

Litchfield, Connecticut, United States
Design Verification Engineer @ MIT Lincoln Laboratory
Sr Verification Engineer @ General Dynamics
Sr Verification Engineer @ SiFive

Senior design verification engineer skilled at planning, documenting, and implementing SystemVerilog testbenches utilizing Universal Verification Methodology (UVM). Decades of experience architecting and implementing High Level Verification (HLV) testbenches in SystemVerilog, C++, RTX, Specman. A proven history of technical lead in verification implementation, management, and individual contributor. Expert in design and verification languages; • SystemVerilog [VCS, Incisive & 

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